Grenoble-based research institute CEA-Leti will present seven papers and posters on next-generation heterogeneous integration at the Electronic Components and Technology Conference (ECTC) in Orlando, May 26–29, 2026. The work spans hybrid bonding, low-temperature processing, superconducting interconnects, and fan-out wafer-level packaging.

A highlight is the first demonstration of die-to-wafer hybrid bonding with a 1 µm pitch, detailed in the paper “Die-To-Wafer Hybrid Bonding Technology down to 1 μm pitch for Multi-Die Stacking Integration.” Researchers will also report the first successful direct hybrid bonding annealed at just 100°C, a breakthrough that allows temperature-sensitive materials like polymers and certain semiconductors to be integrated alongside standard CMOS. Hybrid bonding—where copper and dielectric layers fuse directly—is emerging as the main path for ultra-fine-pitch 3D integration now that micro-bump scaling is hitting limits.

On the applications side, a radar system-in-package with integrated antennas leverages fan-out wafer-level packaging for millimeter-wave use, targeting 5G/6G and automotive radar. This work is presented in collaboration with STMicroelectronics.

Key sessions include presentations by Margot Faure, Mathieu Loyer (ST), and Melissa Najem on the 1 µm pitch bonding, among others. The advances reflect industry-wide alignment on hybrid bonding as a critical enabler for high-performance packaging in the post-gate-scaling era.

ECTC - Electronic Components and Technology Conference

GRENOBLE, France – April 28, 2026– CEA-Leti will present seven papers and posters on technologies shaping the next decade of advanced heterogenous integration at the Electronic Components and Technology Conference (ECTC) May 26-29 in Orlando, Fla.

These developments cover a variety of technologies, including reducing interconnect pitches through hybrid bonding interconnection, for low-temperature processes, superconducting interconnects and fan-out wafer-level packaging.

Hybrid bonding, which is based on direct copper-to-copper and dielectric-to-dielectric connection technology, enables ultra-fine pitch vertical interconnects. It is emerging as the primary path for high-density 3D integration, as micro-bump approaches reach their scaling limits.

For example, in the paper “Die-To-Wafer Hybrid Bonding Technology down to 1 μm pitch for Multi-Die Stacking Integration"CEA-Leti will present its first demonstration of a die-to-wafer hybrid bonding test vehicle with a pitch as small as 1µm.

Low-temperature processing enables heterogeneous integration in which temperature-sensitive materials (polymers, certain semiconductors) must coexist with standard CMOS processes. The ability to form robust interconnects below typical thermal budgets opens pathways for stacking previously incompatible technologies. The first time successful direct hybrid bonding annealed at ultra-low temperatures down to 100 °C will be presented.

As transistor gate-scaling slows, system-level integration through advanced packaging delivers the performance, power, and form-factor improvements that end-users expect. CEA-Leti's research on hybrid bonding that will be presented at ECTC 2026 reflects growing industry alignment around hybrid bonding as a key enabler of next-generation, high-performance packaging.

Beyond foundational process development, CEA-Leti researchers will also present application-specific integration advances:

​RF/Wireless: The RADAR sys​​tem-in-package with integrated antennas demonstrates continued innovation in fan-out wafer-level packaging for millimeter-wave applications, critical for 5G/6G and automotive radar.​

Author: Margot Faure​Session 3Wednesday, May 27 from 9:30 AM – 9:50 AM

Session 3Author: Mathieu Loyer (in collaboration with STMicroelectronics)Wednesday, May 27 from 11:35 AM – 11:55 AM

Session 39 (Poster)Author: Arnaud Garnier​Wednesday, May 27 from 2:30 PM – 4:30 PM​

Session 40Author: Maria-Luisa Calvo-Munoz​Wednesday, May 27 from 4:45 PM – 5:05 PM

Session 39 (Poster)Author: Agathe Lerat​​Thursday, May 28 from 10:00 AM – 12:00 PM

Session 39, (Poster)Author: Pablo RenaudThursday, May 28​ from 10:00 AM – 12:00 PM

​​“Die-To-Wafer Hybrid Bonding Technology down to 1 μm pitch for Multi-Die Stacking Integration"Session 31Author: Melissa Najem​Friday, May 29​from 2:00 PM – 2:20 PM​