CEA-Leti 将铁电 RAM 推进至 22nm 节点,为边缘 AI 解锁更密集、更高效的存储器

CEA-Leti Scales Ferroelectric RAM to 22nm Node, Unlocking Denser, More Efficient Memory for Edge AI

CEA-Leti Original
摘要
法国CEA-Leti在2026年VLSI会议上展示了基于3D垂直结构电容器的22纳米铁电存储器(FeRAM)突破,其单元密度媲美10纳米SRAM且具备非易失性,打破了长期阻碍FeRAM竞争易失性存储的密度瓶颈。该技术消除了唤醒效应,有望将高能效AI推理直接嵌入端侧处理器,减少云端数据传输能耗,并适用于高性能计算、航空航天及物联网平台。

CEA-Leti 在 2026 年 VLSI 会议上宣布,已将铁电存储器(FeRAM)成功推进到 22nm 制程节点。研究人员采用氧化铪锆(HZO)薄膜构建的三维电容器架构,克服了平面结构长期存在的密度瓶颈。基于该垂直结构实现的 1T-1C 存储单元面积仅为 0.047 µm²,比同节点 SRAM 小 2.5 倍,密度已可与更先进的 10nm SRAM 相媲美。由于 FeRAM 具备非易失性,断电后数据不会丢失,这在边缘 AI 等场景中可大幅减少数据搬运带来的能耗与延迟。

研究团队展示了两种兼容 22nm 后端制程的 3D FeCap 集成方案,其工作电压低至 1.3V,选用标准逻辑选择管,电容器初始纵横比约为 4:1。此外,开发者进一步验证了高密度化路径:电容器直径可缩至 60nm、间距 120nm,纵横比提升至 17:1,此时电容占用面积仅 0.0028 µm²。高纵横比在相同阵列密度下扩大了铁电电容器有效表面积,增大了存储窗口。

另一关键突破是该高纵横比 3D 铁电电容表现出“无唤醒”特性。传统 FeRAM 在初始驱动周期中电学参数会发生不可预测的漂移,而此次器件经旋进电子衍射确认,HZO 薄膜中正交晶相占比约 80%,从工作伊始便保持稳定。分析认为,狭窄高比容通孔对材料的约束调整了铁电薄膜的局部应变状态,从而抑制了唤醒行为。

CEA-Leti 计划将上述高纵横比 FeCap 集成到 22nm FDSOI 平台,打造迄今性能最高的嵌入式 FeRAM。相关存储器有望广泛应用于边缘 AI 推理、高性能计算、航空航天与国防系统以及物联网平台,推动终端设备实现更密集、更节能的本地计算。该项目获得欧盟及芯片共同事业体(Fames 项目)资助,并得到法国“France 2030”计划(尤其是 NextGen 项目)的支持。同期,CEA-Leti 创新健康技术部门副主任 Madjid Hihi 博士将在 VLSI 午间时段发表神经技术创新转化为临床应用的演讲。

Summary
CEA-Leti unveiled at VLSI 2026 a 22nm ferroelectric RAM (FeRAM) using 3D capacitors that achieves 2.5x smaller cells than SRAM at the same node and matches 10nm SRAM density, enabling non-volatile, energy-efficient edge AI. The breakthrough, backed by EU and French funding, eliminates a key density barrier and paves the way for integrating dense FeRAM onto 22nm FDSOI processors for computing, IoT, aerospace, and defense applications.

CEA-Leti has scaled ferroelectric RAM (FeRAM) to the 22nm manufacturing node using an innovative 3D vertical capacitor architecture, a milestone reported at the 2026 VLSI Conference in Honolulu. The breakthrough overcomes the long-standing density limitation of planar FeRAM, achieving memory cells 2.5 times smaller than standard 22nm SRAM and matching the density of 10nm SRAM, while retaining non-volatile data storage.

Historically, FeRAM density was constrained by flat capacitor structures where the capacitor, not the transistor, dictated cell size. CEA-Leti’s solution builds hafnium zirconium oxide (HZO) capacitors vertically, harnessing advanced patterning and deposition. The team demonstrated two back-end-of-line integration schemes with 1T-1C bitcells as small as 0.047 µm² operating at just 1.3V, using a 3D FeCap with a ~4:1 aspect ratio. A clear route to even higher density was shown: FeCaps with a 17:1 aspect ratio, 60 nm diameter, and 120 nm pitch shrink the capacitor footprint to a mere 0.0028 µm², maximizing effective surface area and memory window without sacrificing array density.

Crucially, the high-aspect-ratio capacitors exhibited wake-up-free behavior, eliminating the unpredictable electrical drift that plagues conventional FeRAM. Precession electron diffraction confirmed an approximately 80% orthorhombic phase fraction in the HZO film, likely stabilized by strain confinement within the narrow vias.

The advance promises to embed fast, dense, non-volatile memory directly on processors, enabling local AI processing at the edge and reducing the energy and latency costs of cloud dependence. CEA-Leti plans to integrate these capacitors into dense FeRAM arrays on a 22nm FDSOI platform to deliver the highest-performance embedded FeRAM to date. The work targets applications from edge AI and IoT to high-performance computing and aerospace. Funding came from the European Union’s Chips Joint Undertaking (Fames projects) and French public authorities through France 2030 and the NextGen project. In a related note, a CEA-Leti neurotechnology talk at the VLSI luncheon on June 18 highlights the institute’s broader clinical innovation.

Résumé
Le CEA-Leti a présenté au symposium VLSI 2026 une mémoire FeRAM gravée en 22 nm avec une architecture 3D à base d’oxyde d’hafnium-zirconium, atteignant une densité 2,5 fois supérieure à la SRAM tout en restant non volatile. Cette avancée lève un verrou historique et ouvre la voie à des puces d’IA en périphérie plus rapides et économes en énergie, en permettant le traitement local des données sans recours systématique au cloud.

​​​​​​​​​​​Breakthrough Reported at VLSI 2026 Also Extends to High-Performance Computing, Aerospace & Defense Systems, and IoT Platforms​

​HONOLULU, Hawaii — June 15, 2026— CEA-Leti today announced a major advance in memory technology: the demonstration of ferroelectric RAM (FeRAM) scaled to the 22nm manufacturing node using an innovative 3D capacitor architecture. The breakthrough, presented at the VLSI Conference in Honolulu, removes a longstanding density barrier that has kept FeRAM from competing with volatile memory—and opens the door to faster, more energy-efficient artificial intelligence (AI) at the edge.

By vertically integrating ferroelectric capacitors made from hafnium zirconium oxide (HZO) thin films, the team achieved memory cells that are 2.5 times smaller than standard SRAM at the same 22nm node, matching the density of SRAM at the much more advanced 10nm node. Moreover, unlike SRAM, FeRAM retains data without power, combining non-volatility with a density previously attainable only by volatile memory.

Today's smart devices increasingly rely on sending da​ta to the cloud for AI processing—a costly cycle in both time and energy. FeRAM that is both fast and dense enough to embed directly on a processor enables devices to process data locally. The implications extend beyond user convenience: computing operations account for a significant and growing share of global electricity consumption, much of it still generated from fossil fuels.

Historically, FeRAM fabrication was constrained to flat, planar capacitor structures that limited how small and dense memory cells could be manufactured. In these architectures, the capacitor—not the selection transistor—determines the cell footprint because the current flowing through the capacitor during memory operations is inherently low. To overcome this physical limit, CEA-Leti shifted to a vertical architecture, building the capacitor upwards rather than outwards.

The team demonstrated two back-end-of-line (BEOL) integration schemes for 3D ferroelectric capacitors (FeCaps) at 22nm, utilizing advanced patterning and deposition techniques. Array functionality with Gaussian bit distributions was confirmed down to 0.047 μm² 1T-1C FeRAM bitcells operating at just 1.3V, featuring a standard logic selector and a 3D FeCap with an aspect ratio of roughly 4:1.

The researchers also demonstrated a clear path to even greater density: 3D FeCaps with an aspect ratio of 17:1, a 60nm diameter, and a 120nm pitch - shrinking the capacitor footprint to just 0.0028 μm². A higher aspect ratio maximizes the effective surface area of the ferroelectric capacitor within each bitcell, enlarging the memory window without sacrificing array density.

Traditional FeRAM devices often exhibit a phenomenon known as "wake-up," where electrical characteristics shift unpredictably during initial cycling, degrading stability and reliability. CEA-Leti's high-aspect-ratio 3D capacitors exhibited wake-up-free behavior consistent with an approximately 80 percent orthorhombic phase fraction in the HZO film, as confirmed by precession electron diffraction (PED).

While the precise mechanism is still under study, the suppression of wake-up is likely related to the confinement of materials within the narrow, high-aspect-ratio vias, which locally modifies the strain state in the ferroelectric thin film. This stabilizes the crystal phase responsible for memory function from the outset.

CEA-Leti plans to integrate the demonstrated high-aspect-ratio ferroelectric capacitors into dense FeRAM arrays on a 22nm FDSOI platform, aiming to achieve the highest-performance embedded FeRAM to date.

NOTE:Dr.Madjid Hihi,Deputy Director for Clinical Innovation at CEA-Leti's Innovative Health Technologies Division, will speak at a VLSIluncheon from ​​​12:15–1:15 PM,onJune 18. The title of his talk is “Innovative Neurotechnologies – A Journey from the Lab to the Clinic and Back." Neurotechnology is a booming field, andMadjid will highlight clinical world premieres enabled by CEA-Leti technologies.

This project received funding from the European Union and Chips Joint Undertaking (Fames projects), supported by French public authorities (France 2030, in particular through the NextGen project).​

AI Insight
Core Point

CEA-Leti 将铁电存储器(FeRAM)微缩至22nm节点,利用3D电容实现等同10nm SRAM的密度与非易失性,消除了边缘AI本地处理的存储瓶颈。

Key Players
  • CEA-Leti — 法国微电子与纳米技术研究机构,位于格勒诺布尔。
Industry Impact
  • Computing/AI:高 — 直接在处理器上嵌入快速非易失内存,使边缘AI无须云端往返,大幅降低延时与能耗。
  • Terminals/Consumer Electronics:高 — 智能设备可获得兼顾密度与数据保持的本地内存,显著延长电池寿命。
  • Energy:中 — 通过减少数据传输和云端计算间接降低ICT总耗电量。
Tracking

强烈跟踪 — 该突破首次打破平面电容密度限制,若成功移植到22nm FDSOI平台,将改变嵌入式非易失内存市场格局,对IoT、国防、HPC产生连锁影响。

Highlights
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半导体 人工智能 科研
AI Processing
2026-06-15 14:21
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