面向先进数据通信(IA)的封装一体化光学(Co-Packaged Optics)在线咨询研讨会,以及异构集成的系统级设计

Online Consultation Workshop on Co-Packaged Optics for Advanced Data Communication (IA) & System-Level Design for Heterogeneous Integration

AENEAS Quality unknown · 质量未知 by Editor 2026-09-24 12:38 Original
摘要
欧盟“Chips JU”正推进2027工作计划筹备,并邀请欧洲电子元器件与系统(ECS)产业界参与两场线上咨询研讨会(2026年10月5日)。其中第一场聚焦面向AI/HPC的高能效、低时延先进数据通信“共封装光学”(含光引擎与收发器集成、光纤到芯片耦合与热管理、规模化测试与可靠性),第二场讨论面向2030的异构集成系统级设计缺口(安全/灵活性/成本权衡的整体评估、从高层探索到子系统细化的可扩展抽象、架构需求到最终设计决策的全链路可追溯)。参与者将对草案征集反馈并提出新想法,影响Chips JU 2027潜在主题,强化欧洲在相关技术上的自主能力。

随着 Chips JU Work Programme 2027 的筹备推进,欧洲电子元器件与系统(ECS)社区的相关方被邀请参加两场在线咨询研讨会,时间定于 2026 年 10 月 5 日。会议旨在收集产业需求与技术缺口反馈,讨论草案征集方向,并为 2027 年 Chips JU 工作计划的潜在议题提供输入。

第一场研讨会主题为 Co-Packaged Optics for Advanced Data Communication (IA),时间为 09:00–10:30 CEST。讨论重点聚焦面向 AI 与 HPC 基础设施的高能效、高吞吐、低时延数据链路,核心议题包括:光引擎与收发器集成、光纤到芯片耦合及热管理,以及面向规模化、扩展部署和光电路交换的测试与可靠性认证。

第二场研讨会主题为 System-Level Design for Heterogeneous Integration,时间为 10:30–12:00 CEST。该场次将围绕 2030 年前后系统级设计的关键短板展开,重点讨论其在强化欧洲技术主权方面的作用,涵盖:对复杂架构进行早期、整体性的评估,包括安全性、灵活性与成本之间的权衡;从高层探索到子系统细化的可扩展抽象方法;以及从架构需求到最终设计决策的完整可追溯性。

主办方邀请参与者就草案主题的相关性与雄心程度提出反馈,补充新想法,并识别关键创新缺口,同时与来自光子学、封装和 EDA 社区的专家交流。相关方可通过注册参与此次咨询,为 Chips JU Work Programme 2027 的制定贡献专业意见。

Summary
The Chips JU Work Programme 2027 is moving ahead, and the European Electronic Components and Systems (ECS) community is invited to two online consultation workshops on 5 October 2026 to shape draft call topics. Session 1 will focus on co-packaged optics for advanced data communication—covering optical engine/transceiver integration, fiber-to-chip coupling and thermal management, and test/reliability qualification—while Session 2 will address system-level design for heterogeneous integration, including security/cost trade-offs, scalable architecture-to-subsystem refinement, and full traceability from requirements to design decisions. The input from photonics, packaging, and EDA experts is intended to identify industrial technology gaps and strengthen Europe’s technological sovereignty for AI/HPC and advanced chip integration by 2030.

As preparations for the Chips JU Work Programme 2027 advance, stakeholders from across the European Electronic Components and Systems (ECS) community are being invited to two online consultation workshops on 5 October 2026. The sessions are designed to gather industrial input on needs, technology gaps and draft call concepts, helping shape potential topics for the next Chips JU work programme.

The first workshop, Co-Packaged Optics for Advanced Data Communication (IA), will run from 09:00 to 10:30 CEST. It will focus on energy-efficient, high-throughput and low-latency data links for AI and HPC infrastructure. Discussion points include optical engine and transceiver integration, fiber-to-chip coupling and thermal management, and test and reliability qualification needed for scale-up, scale-out and optical circuit switching.

The second session, System-Level Design for Heterogeneous Integration, is scheduled for 10:30 to 12:00 CEST. It will examine system-level design gaps towards 2030 and their importance for strengthening European technological sovereignty. Topics include the early and holistic evaluation of complex architectures, with attention to security, flexibility and cost trade-offs; scalable abstraction from high-level exploration to subsystem refinement; and full traceability from architectural requirements to final design decisions.

Participants are encouraged to comment on the relevance and ambition of the draft topics, suggest new ideas and identify critical innovation gaps. The workshops will also provide a forum to exchange views with experts from the photonics, packaging and EDA communities. Registration and further information are available via the consultation notice.

Résumé
La Chips JU lance deux ateliers de consultation en ligne (5 octobre 2026) pour préparer le Work Programme 2027, avec des échanges sur les besoins industriels et les écarts technologiques. Le premier atelier porte sur les optiques co-embarquées pour des liaisons de données IA/HPC à faible latence et haute efficacité énergétique (intégration optique, couplage fibre-puce, qualification test-fiabilité), tandis que le second se concentre sur le design système pour l’intégration hétérogène d’ici 2030 (évaluation holistique des architectures, passage scalable de l’exploration au raffinement, traçabilité complète), afin de renforcer la souveraineté technologique européenne. Les participants, issus notamment des communautés photoniques, packaging et EDA, sont invités à commenter les concepts d’appels et à proposer de nouveaux sujets.

As preparations for the Chips JU Work Programme 2027 move forward, stakeholders from across the European Electronic Components and Systems (ECS) community are invited to contribute to two upcoming Online Consultation Workshops, taking place on 5 October 2026.

The interactive sessions will provide an opportunity to discuss industrial needs and technology gaps, provide feedback on draft Call concepts, and contribute to shaping potential topics for the Chips JU Work Programme 2027.

Session 1: Co-Packaged Optics for Advanced Data Communication (IA)

09:00–10:30 CEST

The session will focus on energy-efficient, high-throughput and low-latency data links for AI and HPC infrastructure, with discussions covering:

Optical engine and transceiver integration

Fiber-to-chip coupling and thermal management

Test and reliability qualification for scale-up, scale-out and optical circuit switching

Session 2: System-Level Design for Heterogeneous Integration

10:30–12:00 CEST

This session will address key system-level design gaps towards 2030 and their role in strengthening European technological sovereignty. Topics will include:

Early and holistic evaluation of complex architectures, including security, flexibility and cost trade-offs

Scalable abstraction from high-level exploration to subsystem refinement

Full traceability from architectural requirements to final design decisions

Participants are invited to provide feedback on the relevance and ambition of the draft topics, propose new ideas and identify critical innovation gaps, while exchanging with experts from the photonics, packaging and EDA communities.

Join the consultation and contribute your expertise to the preparation of the Chips JU Work Programme 2027. More information and registration here.

The post Online Consultation Workshop on Co-Packaged Optics for Advanced Data Communication (IA) & System-Level Design for Heterogeneous Integration appeared first on Aeneas.

AI Insight
Core Point

Chips JU is running two Oct 5, 2026 online consultations to shape the 2027 work programme around co-packaged optics for AI/HPC and system-level design for heterogeneous integration, targeting key tech gaps and industrial needs.

Key Players

Chips JU — EU initiative coordinating semiconductor research programmes; Brussels, EU.

European ECS community (stakeholders) — Industry/academia contributors providing input on call concepts; Europe.

Industry Impact
  • Computing/AI: High — advances energy-efficient, low-latency optical links for AI/HPC infrastructure.
  • ICT: High — targets fiber-to-chip coupling, thermal management, and reliability qualification for optical interconnects.
  • Energy: Medium — focuses on energy-efficient data links, reducing power per throughput.
  • Computing/AI: Medium — heterogeneous integration system design gaps affect next-gen architectures to 2030.
Tracking

[Strongly track] — Directly influences EU funding priorities and technical roadmaps for optical interconnects and heterogeneous integration.

Highlights
Upcoming Event
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Categories
半导体 人工智能 科研
AI Processing
2026-09-24 15:29
openai / gpt-5.4-nano