CEA-Leti will showcase its latest advances in 3D integration and advanced packaging at the Electronic Components and Technology Conference (ECTC) 2026 in Orlando, Florida, from May 26 to 29. At booth 502, experts will demonstrate key enabling technologies: STARAC, hybrid bonding, Chip-in-Flex, and fan-out wafer-level packaging (FOWLP). These building blocks target next-generation chip integration for heterogeneous system-in-package (SiP), including a multi-chip assembly combining a quantum processor and control chips, and a chiplet-based optical network-on-chip (ONoC) to support novel computing architectures.

The institute will also present seven papers and posters detailing its scientific results. On May 27, the program focuses on low-temperature fine-pitch interconnects. A 9:30 a.m. talk (Session 3) covers morphological and electrical validations of ultra-low temperature annealing for hybrid bonding. At 11:35 a.m., Mathieu Loyer, in collaboration with STMicroelectronics, will explain how nanocrystalline copper microstructures and pre-bond surface treatments enable sub-200°C hybrid bonding. During the afternoon poster session (2:30 p.m., Session 40), researchers will unveil a RADAR SiP with integrated antennas based on a FOWLP RDL-first approach. A 4:45 p.m. presentation (Session 21) introduces electroplated indium micro-bumps as a scalable solution for ultra-fine pitch, low-temperature interconnects.

On May 28, two posters (Session 39, 10:00 a.m.) explore further innovations: the impact of copper density on via-to-via hybrid bonding, and fine-pitch thermally resistive superconducting 3D interconnects for quantum systems. The week concludes on May 29 at 2:00 p.m. (Session 31) with a report on die-to-wafer hybrid bonding achieving pitches down to 1 µm for multi-die stacking.

ECTC is a premier global gathering for packaging and microelectronic systems science and technology. For questions, contact Jean-Charles Souriau, CEA-Leti’s scientific leader in 3D and packaging, based at Maison Minatec in Grenoble.

CEA-Leti will also take part in two other key events. The LID World Summit (June 23–25) will feature its high-performance microLED solutions for displays and data communications, latest semiconductor reliability results, advanced piezoelectric materials, and a roadmap for next-generation MEMS including microphone and optomechanical sensing. A strategic afternoon in Hsinchu, Taiwan, at the Ambassador Hotel, will bring together CEO Sébastien Dauvé, CEA-Leti experts, and ITRI leaders to discuss the global semiconductor outlook, silicon photonics, advanced heterogeneous integration, microLEDs, power management, and AI-enabling hardware architectures.

From 5/26/2026 to 5/29/2026Orlando,USA

COME AND MEET CEA-LETI'S EXPERTS​

This year, CEA-Leti’s booth will exhibit STARAC, Hybrid bonding, Chip-in-Flex, FOWLP. Come and discuss lastest achievements in terms of Next-Generati​on Chip Integration at ECTC 2026

Advanced packaging technology for heterogeneous System-in-Package (SiP)

A multi-chip assembly with quantum processor and control chips

Chiplet-based Optical Network on Chip (ONoC)​​​

An enabling technology for new architectures​

DISCOVERCEA-LETI’S MAJOR SCIENTIFIC RESULTS

May 27, 2026 9:30 AMSession 3-Tuscany D

Hybrid Bonding with Ultra-Low Temperature Annea​ling: Morphological and Electrical Validations

May 27, 2026 11:35 AMSession 3-Tuscany D

Mathieu Loyer(in collaboration with STMicroelectronics)

Enabling Low-Temperature Fine-Pitch Hybrid Bonding: R​ole of Nanocrystalline Copper Microstructures and Pre-Bond Surface Treatments

May 27, 2026 2:30 PMSession 40 (Poster)-​Mediterranean Hallway

RADAR System-in-Package with Integrated Antennas based on Fan-Out Wafer-Level Packaging RDL-First Integration

May 27, 2026 4:45 PMSession 21-​Tuscany D

Electroplated Indium Micro-Bumps: Toward Scalable Low Temperature Ultra-Fine Pitch Interconnects​​

​May 28, 2026 10:00 AM​Session 39 (Poster) -Mediterranean Hallway

Impact of Copper Density on >Via-to-Via Hybrid Bonding: Morphological and Electrical Characterizations

May 28, 2026 10:00 AMSession 39 (Poster)-Mediterranean Hallway

Fine-Pitch Thermally Resistive Superconducting 3D Interconnects for Quantum Systems

May 29, 2026 2:00 PMSession 31-Palazzo D

Die-To-Wafer Hybrid Bonding Technology Down to 1 µm Pitch for Multi-Die Stacking Integration​

The Electronic Components and Technology Conference (ECTC) is the premier international event that brings together the best in packaging, components and microelectronic systems science, technology and education in an environment of cooperation and technical exchange.

More information on ​​ECTC’s website

From 26/05/2026to29/05/2026​ |​Orlando,USA​

Contacts:​Jean-Charles SOURIAU​​with any questions.​​

Scientific leader in 3D & packaging​

Event|Maison Minatec, Grenoble, France

LID World Summit from 23 to 25 June offer you a front-row seat to our most recent advances. Join more than 1,250 semiconductor industry professionals at this three-day global event and come away equipped and inspired to innovate!​

CEA-Leti will introduce their high-performance microLED solutions for next-generation displays and data communications.

CEA-Leti showcases its latest results in semiconductor reliability and advanced piezoelectric materials.

The field of Microelectromechanical Systems (MEMS) has evolved significantly since the 1980s, transitioning from simple capacitive sensors to highly sensitive piezoresistive sensors. This presentation will outline the development roadmap for MEMS, emphasizing innovative materials and sensing technologies that are driving next-generation devices, particularly in microphone MEMS and optomechanical sensing.

Event | Agenda|Ambassador Hotel, Hsinchu, Taiwan

Stay ahead in semiconductor innovation.

Join CEA-Leti CEO Sébastien Dauvé, together with CEA-Leti experts and ITRI leaders and specialists, for a strategic afternoon dedicated to semiconductor innovative technologies and high-level exchanges between French and Taiwanese innovation ecosystems. The program will address global industry outlook, and the latest advances in Silicon Photonics, Advanced Heterogeneous Integration and Packaging, MicroLEDs, Power Management strategies and AI-enabling hardware architectures.