CEA-Leti will play a prominent role at the 52nd International Conference on Micro and Nano Engineering (MNE 2026), held in Interlaken, Switzerland, from September 21 to 24, 2026. The institute has been invited by program chair Helmut Schift of PSI to organize a full-day tutorial on sustainability in the semiconductor industry and life cycle assessment (LCA), marking a second edition after the tutorial first held in Montpellier in 2024 during CEA-Leti’s 50th anniversary celebrations.

The tutorial is designed to train engineers and young researchers in measuring the environmental footprint of semiconductor manufacturing and in adopting more sustainable, eco-responsible practices. It will cover practical case studies spanning resource optimization, reductions in greenhouse gas emissions and energy consumption, and the resilience of electronic components. CEA-Leti says the session will bring together expert lecturers from the field.

At MNE 2026, CEA-Leti will also present two invited papers highlighting its main scientific results. Isabelle Servin will speak on “Sustainable process strategies based on the environmental footprint of semiconductor manufacturing” on Wednesday, September 23, 2026, at 3:00 pm. Fifteen minutes later, Yannick Rivoira will present “From Silica Sand to Semiconductors: Understanding and Assessing Environmental Impacts in Cleanroom Manufacturing.” Both talks are listed on page 24 of the conference program.

In parallel, CEA-Leti will run a workshop titled “Towards Sustainable Semiconductor Manufacturing & Life Cycle Assessment in Microelectronics.” The short course will focus on evaluating ecological footprints in semiconductor manufacturing and on applying eco-design principles across the chain, from cleanroom manufacturing to components and technologies.

The institute directs participants to the MNE 2026 website for more information and provides Isabelle Servin, Sustainability Advisor for Semiconductor Manufacturing, PhD, as the contact for questions.

Beyond MNE, the text also points to several other CEA-Leti activities and events. In Grenoble, the institute is co-organizing the first edition of Open Innovation Materials & Manufacturing Europe (OIM² Europe), described as a new European forum intended to connect cutting-edge research with industrial innovation in advanced materials, nanotechnologies and sustainable manufacturing. Another Grenoble event, the END* symposium in ICT, will address more sustainable integrated hardware and software solutions, with a focus on Europe’s ability to build a more responsible digital sector through frugality, regulation and ethics, while stressing that data mastery is as important as mastery of materials and energy for the sustainability of disruptive digital components and integrated circuits.

CEA-Leti also highlights its investments in multidisciplinary platforms with unique equipment and expertise, saying advances in heterogeneous integration, new materials and photonics are helping drive semiconductor innovation and address the challenges of disruptive AI markets and technologies. At the 19th edition of Leti Innovation Days Tokyo, the CEO will celebrate R&D partnerships in Japan and explore new opportunities to support the Japanese semiconductor industry under the theme “The AI-Chip Revolution: Scaling Innovation in Semiconductors.” High-level speakers and technical experts will deliver keynotes, seminars and live demos at the Residence of France in Japan, where CEA-Leti experts will also be available at the booth to discuss three papers on heterogeneous integration.

Finally, the article notes ESSERC’s mission as an annual European forum for recent advances in solid-state devices and circuits. It emphasizes that rising system-on-chip integration, enabled by semiconductor technology, makes deeper collaboration between technologists, device experts, IC designers and system designers more necessary than ever.

From 9/21/2026 to 9/24/2026Interlaken, Switzerland

CEA-Leti has the honour to be invited to organize a Tutorial on sustainability in semiconductor industry and life cycle assement by the Program Chair, Helmut Schift from PSI institute. It will the second edition after the tutorial held in Montpellier in 2024 during the celebration of 50th anniversary.

This full-day tutorial objective is to train engineers and young researchers both in assessing the environmental footprint assessing (LCA) and adopting sustainable practices in semiconductor industry based on eco-responsible approach. We will illustrate this using practical case studies, ranging from resource optimisation, greenhouse gas (GHG) emissions or energy consumption reduction to the resilience of electronic components.

Lecturers-​experts in their field will be speaking :

CEA-LETI’S MAJOR SCIENTIFIC RESULTS AT MNE 2026

With 2 invited papers, the institute will present this year’s major scientific results atMNE2026, The 52nd International Conference on Micro and Nano Engineering, including the following topics:

​Invited Talk​WednesdaySeptember 23, 20263:00​ pm​

Sustainable process strategies based on the environment​​al footprint of semiconductor manufact​uring » Isabelle Servin1 (1. CEA-Leti) see Page24

​Invited Talk​​WednesdaySeptember 23,​ 2026​3:15 pm

From Silica Sand to Semiconductors: Understanding and Assessing Environmental Impacts in Cleanroom Manufacturing » Yannick Rivoira1 (1. CEA-Leti) see Page 24​

Workshop CEA-Leti  "Towards Sustainable Semiconductor Manufacturing & Life Cycle Assessment in Microelectronics"

The short course organized by CEA-Leti’s will highlight the evaluation of ecological footprint in semicconductor manufacturing and illustrate sustainable microelectronics from clean room manufacturing to components with and technologies by applying the principles of eco-design.​

More information on ​​MNE 2026’s website

From 09/21/2026 to 09/24/2026 |Interlaken, Switzerland

Contact:Isabell​e Servin​with any questions.​​

Sustainability advisor for Semiconductor Manufaturing, PhD

Event | Agenda|Grenoble, France

CEA-Leti is proud to co-organize the first edition of Open Innovation Materials & Manufacturing Europe (OIM² Europe), a new European forum designed to bridge the gap between cutting-edge research and industrial innovation in advanced materials, nanotechnologies, and sustainable manufacturing.

Event|Grenoble Scientific Polygon, France

Europe has the expertise and skills to promote a more responsible digital sector (frugality, regulation, ethics) that creates high-quality jobs. However, mastery of data is just as crucial as mastery of materials and energy when it comes to the operability and sustainability of disruptive digital components and integrated circuits. More sustainable integrated hardware and software solutions will be discussed at the END* symposium in the field of Information & Communication Technologies (ICT)

CEA-Leti has invested in multidisciplinary platforms with unique equipment and expertise. By leveraging advances in heterogeneous integration, new materials and photonics, we are driving semiconductor innovation and tackling the new challenges of disruptive AI markets and technologies.

During this 19th edition of Leti Innovation Days Tokyo, CEA-Leti’s CEO will celebrate R&D partnerships with its partners in Japan and explore new possibilities to support the Japanese semiconductor industry. This year’s theme is “The AI-Chip Revolution: Scaling Innovation in Semiconductors”.

High-level speakers and technical experts will present the latest advances through keynote speeches, seminars and live demos. Join us to enjoy lively networking and exchanges in a unique setting at the Residence of France in Japan.

CEA-Leti experts will be onsite at CEA-Leti's booth and available to discuss the findings of three papers on heterogeneous integration

The aim of ESSERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits. The level of integration for system-on-chip design is rapidly increasing. This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers and system designers is necessary.