Highlights 22 items
The aim of ESSERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits. The level of integration for system-on-chip design is rapidly increasing. This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers and system designers is necessary.
CEA-Leti 将于 2026 年 9 月在西班牙 ESSERC 大会上展示其硬件安全与嵌入式系统评估创新，并联合 FAMES 与 SiNANO 举办关于 10nm 和 7nm FD-SOI 技术的专题研讨会。该机构还将在法国及东京的 Leti Innovation Days 上，探讨以 AI 芯片革命为核心的半导体创新与可持续数字技术。这一系列全球活动凸显了 CEA-Leti 在推动异构集成、
Workshop FAMES-SiNANO Institute
FAMES与SiNANO Institute将于2026年9月7日在西班牙马略卡岛帕尔马举办半日工作坊“FD-SOI Pilot Line Insights and Perspective”，首次深入发布其FAMES试验线在10nm与7nm FD-SOI技术开发方面的技术成果。与此同时，CEA-Leti参加2026年Semicon Taiwan并在“Choose France”展台展示最新半导体进