CEA-Leti, CEA-List and PSMC Collaborate to Integrate RISC-V and MicroLED Silicon Photonics into 3D Stacking and Interposer for Next-Generation AI
法国原子能委员会（CEA）旗下两大旗舰研究所——微纳技术中心Leti与智能数字系统专业机构List，联合晶圆代工厂力积电（PSMC），共同宣布一项战略合作。该合作将融合CEA-List在RISC-V处理器架构上的设计能力与CEA-Leti在硅光子领域的深厚积累，将高带宽通信与高效率计算技术导入PSMC成熟的3D堆叠及中介层平台，为下一代人工智能系统提供创新解决方案。
半导体产业正面临铜互连物理极限逼近、功耗预算日益严苛，以及市场对灵活可扩展计算架构的迫切需求等多重挑战。本次合作精准切入这些瓶颈：通过整合短距、高带宽的光互连，实现数据在芯片间的低能耗高速传输；同时借助可定制的RISC-V处理架构，打破封闭指令集的束缚，构建全新的高性能数据搬移与计算范式。虽然未披露具体量产时间表，但三方技术互补——Leti的硅光子工艺与List的RISC-V IP相结合，并依托PSMC的3D集成量产能力——有望在AI芯片的互联带宽、能效与设计灵活性方面确立新标杆。
CEA-Leti and CEA-List, the microelectronics and intelligent digital systems arms of the French CEA, are joining forces with Taiwanese semiconductor foundry PSMC. The tripartite collaboration will combine CEA-List’s RISC-V processor design capabilities and CEA-Leti’s silicon photonics expertise with PSMC’s proven 3D stacking and interposer platforms to create high-bandwidth, energy-efficient computing fabrics for next-generation AI systems.
The partnership targets the physical limits of copper interconnects, tightening power budgets, and the demand for scalable architectures. By embedding short-reach optical links and customizable RISC-V cores directly into advanced packaging, the initiative promises a new paradigm for high-performance data movement and compute, delivering integrated solutions where traditional electronic approaches fall short.
The two flagship institutes of the French Alternative Energies and Atomic Energy Commission (CEA) are global innovation leaders in microelectronics and intelligent digital systems
GRENOBLE, France – April 3, 2026 – CEA-Leti, a world-leading micro & nanotechnologies research institute, and CEA-List, a specialist in smart digital systems, today announced a strategic collaboration withPowerchip Semiconductor Manufacturing Corporation (PSMC).The collaboration will leverage CEA-List's RISC-V design expertise and CEA-Leti's silicon photonics expertise to introduce high-bandwidth communication and high-efficiency computing technologies into PSMC's established 3D stacking and interposer platforms to deliver solutions for next-generation artificial intelligence (AI) systems.
The semiconductor industry faces mounting challenges, including the physical limits of traditional copper interconnects, increasingly stringent power budgets, and the urgent need for flexible, scalable computing architectures. By integrating short-reach, high-bandwidth optical links for energy-efficient data movement and customizable RISC-V processor architectures, the collaboration directly addresses these constraints and establishes a new paradigm in high-performance data transport and computing architecture.
CEA-Leti, CEA-List, and PSMC are combining RISC-V chiplets with microLED-based silicon photonics in 3D-stacked interposers to overcome copper interconnect limits for next-gen AI, marking a shift to optical on-package data links.
Monitor — collaboration signals a concrete integration path for silicon photonics into commercial 3D packaging; watch for prototype demonstrations and fab adoption timelines.